Fujitsu's New Fractional-N PLLs Provide Low Noise, Fast Lock-up Time for Wireless Mobile Communications Applications

A new series of Dual Phase Locked Loop (PLL) frequency synthesizers with operating frequencies ranging from 50MHz to 2600MHz is now available from Fujitsu Microelectronics, Inc. (FMI). Each one of these new Dual PLLs includes a main RF Fractional-N PLL and a IF Integer-N PLL.

The new Fractional-N PLLs feature a spurious cancellation technology based on a standardized constant time. Fujitsu's technology provides reduced spurious noise, enables low power consumption of only 18mW, and delivers lock-up times as fast as 150 microseconds, some 50 percent faster than integer PLLs.

Fujitsu's Fractional-N technology meets the requirements of current and next-generation digital mobile communication systems such as CDMA, GSM, GPRS and W-CDMA.

The new PLL Series includes the MB15F83UL (2.0GHz/600MHz), MB15F86UL (2.5GHz/600MHz) and MB15F88UL (2.6GHz/1.2GHz). All three PLLs provide RF and IF sections, serial input programmable dividers, balanced output charge pumps with 1.5mA and 6.0mA current levels selectable by serial data, power-save controls and a digital lock detector.

The series is pin-to-pin compatible with Fujitsu's Dual UL series integer PLL products. The PLLs come in thin, 20-pin bump chip carrier packages (BCCs), which measure only 3.4 mm x 3.6 mm x 0.6 mm, the smallest in the industry. Pricing for the Fractional-N PLL series begins at under $1.80 each in 100,000-unit quantities.

"This new series is ideal for new generations of cellular designs," said Keith Horn, FMI's vice president of marketing. "These Fractional-N PLLs provide speed and phase-noise benefits that are superior to other Fractional-N PLL offerings. In addition, our new thin bump chip carrier packaging reduces board space by a critical 36 percent."

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